The present invention relates to a semiconductor pressure sensor for detecting a pressure difference or a pressure and, more particularly, to the layout structure of temperature detection gages.
As a conventional semiconductor pressure sensor of this type, a sensor using an Si (silicon) semiconductor diaphragm is known. This Si diaphragm type semiconductor pressure sensor is formed as follows. A gage serving as a piezoelectric region is formed on the upper surface of a semiconductor substrate by diffusion of an impurity or ion implantation. In addition, leads are formed by vapor deposition of Al or the like. Part of the lower surface of the substrate is then etched to form a thin portion having a thickness of about 20 .mu.m to 50 .mu.m, i.e., a diaphragm. In the pressure sensor formed in this manner, when measurement pressures are respectively applied to the upper and lower surfaces of the diaphragm, the resistivity of the gage changes upon deformation of the diaphragm. By detecting an output voltage accompanying this change in resistivity, a pressure difference or a pressure is measured.
Recently, a composite function type semiconductor pressure sensor has been known. As disclosed in Japanese Patent Laid-Open No. 4-113239, in order to prevent a shift in zero point of the sensor due to a change in temperature or static pressure, this sensor is designed to detect a static pressure and a temperature and correct a pressure difference or pressure signal by using the detection signal, thereby measuring a pressure difference or a pressure with higher precision. Especially, temperature compensation is important because the temperature dependency of piezoelectric resistance coefficients increases with a decrease in impurity concentration of a semiconductor substrate.
FIGS. 6 and 7 show such a conventional composite function type semiconductor pressure sensor. Reference numeral 1 denotes a back plate consisting of pyrex, a ceramic material, or the like which has almost the same linear expansion coefficient as that of a semiconductor substrate 2. The back plate 1 has a pressure introduction hole 3 extending through its upper and lower surfaces. The semiconductor substrate 2 is electrostatically joined to the upper surface of the back plate 1. The semiconductor substrate 2 consists of an n-type single crystal Si having a (001) plane. A recess portion 4 is formed in the lower surface of the semiconductor substrate 2 to form a thin portion which constitutes a disk-like pressure-difference-sensitive diaphragm 5. Four pressure difference detection gages 6 for detecting a pressure difference or a pressure are formed on the upper surface of the diaphragm 5 at equal angular intervals. In addition, four temperature compensation gages 8 for detecting a temperature are formed, outside the diaphragm 5, on the surface of an outer peripheral portion of the semiconductor substrate 2 at equal angular intervals. The recess portion 4 formed in the lower surface of the semiconductor substrate 2 communicates with the pressure introduction hole 3 so that one measurement pressure P1 is introduced to the pressure introduction hole 3. Each pressure difference detection gage 6 is formed by diffusion of an impurity or ion implantation and serves as a piezoelectric resistive region (piezoelectric resistive element). The four pressure difference detection gages 6 constitute a Wheatstone bridge through leads 9 formed by vapor deposition of Al or the like so as to differentially output a pressure difference signal based on measurement pressures P1 and P2 applied to the upper and lower surfaces of the diaphragm 5. The maximum measurement pressure difference and the maximum measurement pressure are about 140 kgf/cm.sup.2 and 420 kgf/cm.sup.2, respectively.
The piezoelectric resistance coefficients of each pressure difference detection gage 6 decrease with an increase in amount of an impurity doped into the semiconductor substrate regardless of whether the impurity is of p type or n type. For this reason, in order to increase the rate of change in resistivity of the pressure difference detection gage 6 to improve sensitivity with respect to pressure, the concentration of an impurity is set to be low. In addition, the piezoelectric resistance coefficients change depending on whether a p-type or n-type impurity is used. The piezoelectric resistance coefficients are larger when a p-type impurity is used than when an n-type impurity is used. For this reason, a p-type resistive layer is generally formed on an n-type semiconductor.
The output voltage of each pressure difference detection gage 6 changes depending on the shape and thickness of the diaphragm, the position of the pressure difference detection gage 6, the direction of the gage 6, and the like. For example, consider the direction of the pressure difference detection gage 6. If the pressure difference detection gage 6 is to be formed on Si having a (001) plane, the piezoelectric resistance coefficients are maximized in the &lt;110&gt; crystallographic direction. Therefore, the pressure difference detection gage 6 is preferably formed in this direction.
Similar to the pressure difference detection gages 6, the temperature compensation gages 8 are formed by diffusion of an impurity or ion implantation and serve as piezoelectric resistive regions (piezoelectric resistive elements). The temperature compensation gages 8 constitute a Wheatstone bridge through leads (not shown) formed by vapor deposition of Al or the like to output a temperature detection signal. Each temperature compensation gage 8 is formed on the surface of a thick portion 115 of the semiconductor substrate 2 in the &lt;010&gt; (or &lt;100&gt;) crystallographic direction in which the piezoelectric resistance coefficients in the (001) plane are minimized. Each temperature compensation gage 8 is formed in this direction so as not to be sensitive to the measurement pressures P1 and P2 applied to the upper and lower surfaces of the diaphragm 5.
FIG. 8 shows the distributions of piezoelectric resistance coefficients .pi.1 and .pi.t of a p-type piezoelectric resistive element with respect to the (001) plane of an Si diaphragm. The piezoelectric resistance coefficients .pi.1 and .pi.t are maximized in the &lt;110&gt; crystallographic direction and are minimized in the &lt;010&gt; and &lt;100&gt; crystallographic directions.
In the above-described conventional semiconductor pressure sensor, the temperature compensation gages 8 must be formed to be aligned with the &lt;010&gt; or &lt;100&gt; crystallographic directions, in which the piezoelectric resistance coefficients in the (001) plane are minimized, so as not to be sensitive to pressures. It is, however, difficult to form the temperature compensation gages 8 to be accurately aligned with the crystallographic direction in which the piezoelectric resistance coefficients are minimized, because of alignment errors in the formation of the gages. As is apparent from FIG. 6, if any of the temperature compensation gages 8 is shifted from the intended crystallographic direction, even slightly, the gage responds to a stress generated at the corresponding place. As a result, an error occurs in the output voltage. Consequently, a pressure difference or pressure signal based on the outputs from the pressure difference detection gages cannot be corrected with high precision.